The invention relates to a configuration for carrying out a current-to-voltage conversion, preferably for an infrared receiver. This configuration comprises a transimpedance stage, which contains a multistage amplifier and which exhibits two inputs with first coupling capacitances, which are connected between the photodiode and the inputs of the transimpedance stage, and two outputs. The outputs of the transimpedance stage are connected to the inputs of a configuration for gain control; and the output of the configuration for the gain control is connected to the gain control input of the transimpedance stage. The outputs of the transimpedance stage are connected to an associated input of a comparator.
The further development and, above all, the advancing miniaturization, for example, of IrDA modules (infrared data association) has resulted in increasingly more stringent demands on the IrDA transceiver chips, which are integrated in said IrDA modules, as well as the transmit-receive diodes. Hence, this trend demands higher sensitivities, smaller chip areas and less operating current and/or decreasing operating voltages.
Owing to the manufacturing tolerances in the production process all of the symmetrical circuit parts of both amplifier stages and the transimpedance resistors are asymmetrical. Consequently, despite an input voltage Ue of Ue=0V at the input stage, an output voltage Ua≠0V is produced. This output voltage, which is referred to as the static offset, may vary in magnitude from chip to chip and may be positive or negative. Since the receivers comprise, according to the prior art, two stages (a first stage, which is wired as the transimpedance amplifier stage, and a second stage, which is wired as the voltage amplifier), the static offset, which is produced by the first stage, is amplified even more by the second stage, which is downstream of the first stage. This offset interferes with the generation of a pulse-accurate signal by a comparator, following the transimpedance stage.
The prior art discloses a plurality of methods for compensating the static offset.
A first method consists of measuring the static offset and compensating this static offset in accordance with the chopper principle while the device is running. The drawbacks of this method lie in the necessity of an active additional circuit for measuring and compensating, a large load capacitor, a higher current and area requirement owing to this configuration as well as potential noise emissions by the clock generator of the additional circuit. The offset has to be measured and compensated during the pulse or transmission breaks. Therefore, this method is inappropriate for a continuous-time input signal, because, for example, in the case of an infrared receiver it is not known at what point in time the light pulses will arrive.
A second method consists of separating the static offset by means of the coupling capacitances. These coupling capacitances are inserted between the outputs of the transimpedance stage and the inputs of a downstream comparator. Since a low low-frequency offset is necessary for a signal transmission that is a true reproduction of the original, the coupling capacitors must be dimensioned so as to match in size. Therefore, the drawback with this solution lies in the higher area requirement for the coupling capacitors. Another drawback lies in the generation of additional pole positions in the transmission function of the entire configuration by means of the coupling capacitances in interaction with the other circuit components. Thus, extensive measures for realizing a standardized transmission in accordance with the IrDA protocol are necessary, because no other pulses, besides the pluses of the input pattern, may be generated by the intrinsic dynamics of the configuration.
A third possibility consists of calibrating the transimpedance stage during the production process. In order to carry out this calibration, the chip must have additional elements that can be calibrated and that exhibit a suitable circuitry. Then these additional elements are balanced, for example, with a laser. This process usually consists of a plurality of calibration and measuring operations, which must be repeated, before the chip is balanced. Therefore, the drawbacks with this solution lie in the higher space requirement owing to the additional elements and the time-consuming and complicated calibration.
Owing to the above described drawbacks these compensation operations are unsuitable for small, economical chips, which are used for differentiating protocols, such as the specifications SIR (serial infrared) or MIR (medium infrared).